With the increasing scaling of integrated circuits, metal-oxide-semiconductor (MOS) devices become increasingly smaller. Gate oxides, sometimes referred to as gate dielectrics, in MOS devices become thinner accordingly. This increases the possibility of certain side effects.
In a newly manufactured MOS device, there is a random number of traps in the gate oxide. Over time, due to operational stress, more traps form, leading to small transient conductive paths through the oxide. During this process, current conduction is caused by a combination of conductive paths formed by oxide traps and tunneling through the oxide. The formation of these conductive paths is referred to as soft breakdown (SBD). These conductive paths may become fixed by a high current density that causes a high temperature at the defect location. High temperature may alternatively relocate some of the oxide traps, breaking the conductive path. However, under normal operating conditions, soft breakdown persists. After a number of SBD incidents, many traps exist within the oxide, leading to a consistently high current density. Eventually, the resulting heat may generate holes in the oxide and melt the conductive materials at the gate. Thus, a persistent low-resistance path is formed, leading to a hard breakdown (HBD).
Both soft breakdown and hard breakdown are irreversible under normal device operating conditions. Hard breakdown will cause the device to malfunction, resulting in integrated circuit failure. A device experiencing soft breakdown, on the other hand, may still function correctly. However, a device experiencing soft breakdown will draw an excessive leakage current, and may lead to hard breakdown. Therefore, previous researchers have treated soft breakdown as an undesirable effect and have concentrated on how to eliminate or at least reduce soft breakdown.
The preferred embodiments of the present invention provide a new approach for researching and using the soft breakdown mechanism.